high performance computing mcq questions and answers
1. Data hazards occur when
- Greater performance loss
- Pipeline changes the order of read/write access to operands
- Some functional unit is not fully pipelined
- Machine size is limited
Pipeline changes the order of read/write access to operands
2. Systems that do not have parallel processing capabilities are
- SISD
- SIMD
- MIMD
- All of the above
SISD
3. How does the number of transistors per chip increase according to Moore ´s law?
- Quadratically
- Linearly
- Cubicly
- Exponentially
Exponentially
4. Parallel processing may occur
- in the instruction stream
- in the data stream
- both[1] and [2]
- none of the above
both[1] and [2]
5. Execution of several activities at the same time
- processing
- parallel processing
- serial processing
- multitasking
parallel processing
6. Cache memory works on the principle of
- Locality of data
- Locality of memory
- Locality of reference
- Locality of reference & memory
Locality of reference
7. SIMD represents an organization that _________
- refers to a computer system capable of processing several programs at the same time.
- represents organization of single computer containing a control unit, processor unit and a memory unit.
- includes many processing units under the supervision of a common control unit
- none of the above.
includes many processing units under the supervision of a common control unit
8. General MIMD configuration usually called
- a multiprocessor
- a vector processor
- array processor
- none of the above.
a multiprocessor
9. MIMD stands for
- Multiple instruction multiple data
- Multiple instruction memory data
- Memory instruction multiple data
- Multiple information memory data
Multiple instruction multiple data
10. M.J. Flynn’s parallel processing classification is based on:
- Multiple Instructions
- Multiple data
- Both (a) and (b)
- None of the above
Both (a) and (b)
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11. The major disadvantage of pipeline is:
- High cost individual dedicated
- Initial setup time If branch instruction is encountered
- the pipe has to be flushed
- All of the above
the pipe has to be flushed
12. A topology that involves Tokens.
- Star
- Ring
- Bus
- Daisy Chaining
Ring
13. multipoint topology is
- bus
- star
- mesh
- ring
bus
14. In super-scalar mode, all the similar instructions are grouped and executed together.
- TRUE
- False
TRUE
15. Which mechanism performs an analysis on the code to determine which data items may become unsafe for caching, and they mark those items accordingly?
- Directory protocol
- Snoopy protocol
- Server based cache coherence
- Compiler based cache coherence
Compiler based cache coherence
16. How many processors can be organized in 5-dimensional binary hypercube system?
- 25
- 10
- 32
- 20
32
17. Multiprocessors are classified as ________.
- SIMD
- MIMD
- SISD
- MISD
MIMD
18. Which of the following is not one of the interconnection structures?
- Crossbar switch
- Hypercube system
- Single port memory
- Time-shared common bus
Single port memory
19. Which combinational device is used in crossbar switch for selecting proper memory from multiple addresses?
- Multiplexer
- Decoder
- Encoder
- Demultiplexer
Multiplexer
hpc mcq questions
20. How many switch points are there in crossbar switch network that connects 9 processors to 6 memory modules?
- 50
- 63
- 60
- 54
54 (switch points = no. of processors * no. of memory modules)
21. In a three-cube structure, node 101 cannot communicate directly with node?
- 1
- 11
- 100
- 111
11
22. Which method is used as an alternative way of snooping-based coherence protocol?
- Directory protocol
- Memory protocol
- Compiler based protocol
- None of above
Directory protocol
23. snoopy cache protocol are used in —————–based system
- bus
- mesh
- star
- hypercube
bus
24. superscalar architecture contains ————-execution units for instruction execution
- multiple
- single
- none of the above
multiple
25. time taken by header of a message between two directly connected nodes is called as—————–
- startup time
- per hop time
- per word transfer time
- packaging time
per hop time
26. the number of switch requirement for a network with n input and n output is —–
- n
- n2
- n3
- n4
n2
27. which of the following is not static network
- bus
- ring
- mesh
- crossbar switch
crossbar switch
28. In super-scalar processors, ________ mode of execution is used.
- In-order
- Post order
- Out of order
- None of the mentioned
Out of order
29. Which of the following is a combination of several processors on a single chip?
- Multicore architecture
- RISC architecture
- CISC architecture
- Subword parallelism
Multicore architecture
30. The important feature of the VLIW is …..
- ILP
- Cost effectiveness
- performance
- None of the mentioned
ILP
30. The important feature of the VLIW is …..
- ILP
- Cost effectiveness
- performance
- None of the mentioned
ILP
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31. The parallel execution of operations in VLIW is done according to the schedule determined by …..
- sk scheduler
- Interpreter
- Compiler
- Encoder
Compiler
32. The VLIW processors are much simpler as they do not require of …..
- Computational register
- Complex logic circuits
- SSD slots
- Scheduling hardware
Scheduling hardware
33. The VLIW architecture follows ….. approach to achieve parallelism.
- MISD
- SISD
- SIMD
- MIMD
MIMD
34. Which of the following is not a Pipeline Conflicts?
- Timing Variations
- Branching
- Load Balancing
- Data Dependency
Load Balancing
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